A common type of ADC charges one or more capacitors with an instantaneous analog voltage at a sampling time. After the capacitors are charged, the sampling time ends, and the capacitors are isolated from the source of the analog voltage signal. A digital representation of the sampled voltage is then generated. In some ADC's, the sample rate can be very high, resulting in high frequency transients.
In a typical ADC system, the analog signal used to charge the capacitors is generated by a driver (typically a unity gain buffer) that receives the source analog input voltage and ensures that the analog signal into the ADC is of a sufficient current. The driver may form a front end of an ADC integrated circuit. Such a driver should, ideally, provide an analog signal to the ADC capacitors during the sampling time that is not affected by any in-rush current into the ADC. However, there will always be some distortion of the analog signal, due to in-rush current transients, at the end of the sampling time when the analog output signal of the driver is charging the capacitors. Such distortion limits the minimum sampling time.
The ideal driver must have an output that is not affected by the transients. The typical driver uses a single feedback loop between its input and output for maintaining accuracy and load drive.
Although it may be desirable to operate a driver in high closed loop gain to improve the signal to noise ratio into the ADC, a high gain driver does not have the ability to adequately respond to the output transients caused by the in-rush current into the ADC. This is because an amplifier's bandwidth, and its ability to respond to transients, decreases with increases in its closed loop gain. Therefore, prior art drivers for an ADC typically operate in unity gain.
What is needed is a driver for an ADC that has a very good (i.e., fast) response to output transients and is able to operate in a high closed loop gain to improve the signal to noise ratio of the system.